8-bit asynchronous wave-pipelined RSFQ Arithmetic-Logic Unit

T. Filippov; M. Dorojevets; A. Sahu; A. Kirichenko; C. Ayala; O. Mukhanov

doi:10.1109/TASC.2010.2103918

8-bit asynchronous wave-pipelined RSFQ Arithmetic-Logic Unit

T. Filippov
, M. Dorojevets
, A. Sahu
, A. Kirichenko
, C. Ayala
, O. Mukhanov

Electrical Engineering

HYPRES, Inc.
Stony Brook University

Research output: Contribution to journal › Article › peer-review

65 Scopus citations

Abstract

We have designed and demonstrated an Arithmetic-Logic Unit (ALU) based on RSFQ technology as a required step toward building an 8-bit RSFQ processor datapath. The circuit was designed and fabricated with HYPRES' standard 4.5 kA/cm² process. The target clock frequency of the ALU is 20 GHz. In this paper, we present the design and functionality (low-speed) test results of the 8-bit ALU.

Original language	English
Article number	5710671
Pages (from-to)	847-851
Number of pages	5
Journal	IEEE Transactions on Applied Superconductivity
Volume	21
Issue number	3 PART 1
DOIs	https://doi.org/10.1109/TASC.2010.2103918
State	Published - Jun 2011

Keywords

Adder
ALU
Microprocessor
RSFQ
SFQ
Timing

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10.1109/TASC.2010.2103918

Cite this

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AU - Sahu, A.

AU - Kirichenko, A.

AU - Ayala, C.

AU - Mukhanov, O.

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KW - Microprocessor

KW - RSFQ

KW - SFQ

KW - Timing

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ER -

8-bit asynchronous wave-pipelined RSFQ Arithmetic-Logic Unit

Abstract

Keywords

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