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A 1.2-GHz comparator with adaptable offset in 0.35-μm CMOS

  • University of Maryland, College Park
  • Virage Logic
  • LLC

Research output: Contribution to journal › Article › peer-review

46 Scopus citations

Abstract

We apply the technique of floating-gate differential injection to a 1.2-GHz CMOS comparator to achieve arbitrary, accurate, and adaptable offsets. The comparator uses nonvolatile charge storage on floating-gate nodes for either offset nulling or automatic programming of a desired offset. We utilize impact-ionized pFET hot-electron injection to achieve fully automatic offset programming. The design has been fabricated in a commercially available 4-metal, 2-poly 0.35-μm CMOS process. Experimental results confirm the ability to reduce the variance of comparator offset by 3600 × and to accurately program a desired offset with maximum observed residual offset of 469 μV and standard deviation of 199 μ V. We achieve controlled injection to accurately program the input offset to voltages uniformly distributed from -1 to 1 V. The comparator operates at 1.2 GHz with a power consumption of 3.3 mW.

Original languageEnglish
Pages (from-to)2584-2594
Number of pages11
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Volume55
Issue number9
DOIs
StatePublished - 2008

Keywords

  • Adaptive systems
  • Analog memories
  • Analog-digital conversion
  • Calibration
  • CMOS analog integrated circuits (ICs)
  • Comparators
  • Floating gate
  • High-speed ICs
  • Hot carriers
  • Offset cancellation

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