TY - GEN
T1 - A double-end sourced multi-chip improved wire-bonded SiC MOSFET power module design
AU - Wang, Miao
AU - Luo, Fang
AU - Xu, Longya
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2016/5/10
Y1 - 2016/5/10
N2 - This paper proposes an improved wire-bonded design with a unique double-end sourced (DES) structure for multi-chip paralleled silicon carbide (SiC) power modules. The new structure adopts two pairs of DC bus-bars to source the power module from the two ends, not only shortens the equivalent power loops but also provides a symmetrical structure for the paralleled devices. The proposed design achieved a minimized power-loop inductance of 7.2 nH. In addition, the design improved current sharing among the paralleled devices. A 1200 V, 60 A SiC metal-oxide-semiconductor field-effecttransistor (MOSFET) half-bridge module (3 devices in parallel) is fabricated and tested for verification. Improved performances are observed in both switching and continuous operation. A converter level design is also presented to accommodate this unique module structure.
AB - This paper proposes an improved wire-bonded design with a unique double-end sourced (DES) structure for multi-chip paralleled silicon carbide (SiC) power modules. The new structure adopts two pairs of DC bus-bars to source the power module from the two ends, not only shortens the equivalent power loops but also provides a symmetrical structure for the paralleled devices. The proposed design achieved a minimized power-loop inductance of 7.2 nH. In addition, the design improved current sharing among the paralleled devices. A 1200 V, 60 A SiC metal-oxide-semiconductor field-effecttransistor (MOSFET) half-bridge module (3 devices in parallel) is fabricated and tested for verification. Improved performances are observed in both switching and continuous operation. A converter level design is also presented to accommodate this unique module structure.
KW - current-sharing
KW - double-end sourced
KW - multi-chip power module
KW - power-loop inductance
KW - silicon carbide metal-oxide-semiconductor field-effecttransistor
KW - wire-bonded
UR - https://www.scopus.com/pages/publications/84973610877
U2 - 10.1109/APEC.2016.7467949
DO - 10.1109/APEC.2016.7467949
M3 - Conference contribution
AN - SCOPUS:84973610877
T3 - Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC
SP - 709
EP - 714
BT - 2016 IEEE Applied Power Electronics Conference and Exposition, APEC 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 31st Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2016
Y2 - 20 March 2016 through 24 March 2016
ER -