TY - GEN
T1 - A THREE-FACE UTILIZED HEAT SINK DESIGN for 3-D INTEGRATED 75 KVA INTELLIGENT POWER STAGE (IPS)
AU - Mirza, Abdul Basit
AU - Xu, Xiaoqiang
AU - Emon, Asif Imran
AU - Luo, Fang
AU - Chen, Shikui
N1 - Publisher Copyright:
Copyright © 2022 by ASME.
PY - 2022
Y1 - 2022
N2 - This paper proposes a three-face utilized heat sink design for a 3-D integrated SiC-based 75 kVA Intelligent Power Stage (IPS). The structure enables maximum utilization of the heat sink where all three faces of the heat sink are utilized to hold the power devices. For loss estimation from power devices, Model Based Optimization (MBO), an efficiency calculation algorithm, is developed to estimate power loss at 75 kVA for the IPS, which needs to be dissipated efficiently by the heat sink. Further for simplified and cost-effective heat sink fabrication, cylindrical holes are considered to replace conventional fins. A parametric analysis is performed using SOLIDWORKS to determine optimum number of holes for efficient heat spreading and air flow. The simulation results show that heat sink based on cylindrical holes is effective in keeping the MOSFET die temperature under 120 °C in continuous operation, with 35 % reduction heat sink volume compared with the conventional single-sided cooled design.
AB - This paper proposes a three-face utilized heat sink design for a 3-D integrated SiC-based 75 kVA Intelligent Power Stage (IPS). The structure enables maximum utilization of the heat sink where all three faces of the heat sink are utilized to hold the power devices. For loss estimation from power devices, Model Based Optimization (MBO), an efficiency calculation algorithm, is developed to estimate power loss at 75 kVA for the IPS, which needs to be dissipated efficiently by the heat sink. Further for simplified and cost-effective heat sink fabrication, cylindrical holes are considered to replace conventional fins. A parametric analysis is performed using SOLIDWORKS to determine optimum number of holes for efficient heat spreading and air flow. The simulation results show that heat sink based on cylindrical holes is effective in keeping the MOSFET die temperature under 120 °C in continuous operation, with 35 % reduction heat sink volume compared with the conventional single-sided cooled design.
KW - 3-D Integrated Intelligent Power Stage (IPS)
KW - Cylindrical Holes
KW - Model Based Optimization (MBO)
KW - Three-Sided Cooled Heat Sink
KW - Wide Band Gap (WBG) Devices
UR - https://www.scopus.com/pages/publications/85144625668
U2 - 10.1115/IPACK2022-97886
DO - 10.1115/IPACK2022-97886
M3 - Conference contribution
AN - SCOPUS:85144625668
T3 - Proceedings of ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, InterPACK 2022
BT - Proceedings of ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, InterPACK 2022
PB - American Society of Mechanical Engineers (ASME)
T2 - ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, InterPACK 2022
Y2 - 25 October 2022 through 27 October 2022
ER -