A VHDL-AMS compiler and architecture generator for behavioral synthesis of analog systems

Alex Doboli; Ranga Vemuri

doi:10.1109/DATE.1999.761143

A VHDL-AMS compiler and architecture generator for behavioral synthesis of analog systems

Alex Doboli
, Ranga Vemuri

Electrical Engineering

University of Cincinnati

Research output: Contribution to journal › Conference article › peer-review

15 Scopus citations

Abstract

This paper presents a complete method for automatically translating VHDL-AMS behavioral-specifications of analog systems into op amp level net-lists of library components. We discuss the three fundamental aspects, that pertain to any behavioral synthesis environment the specification language, the rules for compiling language constructs into a technology-independent, intermediate representation, and the synthesis (mapping) of representations to net-lists (topologies) of library components, so that performance constraints are satisfied. We motivate the effectiveness of the method by presenting our synthesis results for 5 examples.

Original language	English
Article number	761143
Pages (from-to)	338-345
Number of pages	8
Journal	Proceedings -Design, Automation and Test in Europe, DATE
DOIs	https://doi.org/10.1109/DATE.1999.761143
State	Published - 1999
Event	Design, Automation and Test in Europe Conference and Exhibition 1999, DATE 1999 - Munich, Germany Duration: Mar 9 1999 → Mar 12 1999

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@article{041d0f1ea17d4093b38963a85f203e2d,

title = "A VHDL-AMS compiler and architecture generator for behavioral synthesis of analog systems",

abstract = "This paper presents a complete method for automatically translating VHDL-AMS behavioral-specifications of analog systems into op amp level net-lists of library components. We discuss the three fundamental aspects, that pertain to any behavioral synthesis environment the specification language, the rules for compiling language constructs into a technology-independent, intermediate representation, and the synthesis (mapping) of representations to net-lists (topologies) of library components, so that performance constraints are satisfied. We motivate the effectiveness of the method by presenting our synthesis results for 5 examples.",

author = "Alex Doboli and Ranga Vemuri",

year = "1999",

doi = "10.1109/DATE.1999.761143",

language = "English",

pages = "338--345",

journal = "Proceedings -Design, Automation and Test in Europe, DATE",

issn = "1530-1591",

note = "Design, Automation and Test in Europe Conference and Exhibition 1999, DATE 1999 ; Conference date: 09-03-1999 Through 12-03-1999",

}

TY - JOUR

T1 - A VHDL-AMS compiler and architecture generator for behavioral synthesis of analog systems

AU - Doboli, Alex

AU - Vemuri, Ranga

PY - 1999

Y1 - 1999

N2 - This paper presents a complete method for automatically translating VHDL-AMS behavioral-specifications of analog systems into op amp level net-lists of library components. We discuss the three fundamental aspects, that pertain to any behavioral synthesis environment the specification language, the rules for compiling language constructs into a technology-independent, intermediate representation, and the synthesis (mapping) of representations to net-lists (topologies) of library components, so that performance constraints are satisfied. We motivate the effectiveness of the method by presenting our synthesis results for 5 examples.

AB - This paper presents a complete method for automatically translating VHDL-AMS behavioral-specifications of analog systems into op amp level net-lists of library components. We discuss the three fundamental aspects, that pertain to any behavioral synthesis environment the specification language, the rules for compiling language constructs into a technology-independent, intermediate representation, and the synthesis (mapping) of representations to net-lists (topologies) of library components, so that performance constraints are satisfied. We motivate the effectiveness of the method by presenting our synthesis results for 5 examples.

UR - https://www.scopus.com/pages/publications/84893544413

U2 - 10.1109/DATE.1999.761143

DO - 10.1109/DATE.1999.761143

M3 - Conference article

AN - SCOPUS:84893544413

SN - 1530-1591

SP - 338

EP - 345

JO - Proceedings -Design, Automation and Test in Europe, DATE

JF - Proceedings -Design, Automation and Test in Europe, DATE

M1 - 761143

T2 - Design, Automation and Test in Europe Conference and Exhibition 1999, DATE 1999

Y2 - 9 March 1999 through 12 March 1999

ER -

A VHDL-AMS compiler and architecture generator for behavioral synthesis of analog systems

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