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Adaptive log domain filters using floating gate transistors

  • University of Maryland, College Park

Research output: Contribution to journalConference articlepeer-review

6 Scopus citations

Abstract

We present an adaptive log domain filter with integrated learning rules for model reference estimation. The system is a first order low pass filter based on a log domain topology that incorporates multiple input floating gate transistors to implement on-line learning of gain and time constant. Adaptive dynamical system theory is used to derive robust learning rules for both gain and timeconstant adaptation in a system identification task. The adaptive log domain filters have simulated cutoff frequencies above 100kHz with power consumption of 23μW and show robust adaptation of the estimated gain and time constant as the parameters of the reference filter are changed.

Original languageEnglish
Pages (from-to)I29-I32
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume1
StatePublished - 2004
Event2004 IEEE International Symposium on Cirquits and Systems - Proceedings - Vancouver, BC, Canada
Duration: May 23 2004May 26 2004

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