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An ultra-low frequency ring oscillator with programmable tracking using a phase-locked loop

  • University of Maryland, College Park

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

This paper presents a programmable ultra-low frequency ring oscillator designed in a 0.5μm CMOS technology with 3.3 V power supply. In normal operation, the oscillator produces a periodic signal without external inputs (other than power and ground). During programming, the oscillator tracks and memorizes the input reference frequency using a phase-locked loop (PLL) architecture. The PLL controls an on-chip nonvolatile memory using a floating gate structure; the voltage on the floating gate node is applied to the voltage-controlled oscillator (VCO) to generate the desired frequency. A high-voltage NMOS is introduced to realize the floating gate control; measurement results show that the breakdown voltage is close to 40 V. Transient simulations indicate that the circuit successfully tracks a desired frequency with maximum period jitter of 0.49 μs at the VCO output which translates to frequency error of 0.88 % at the system output.

Original languageEnglish
Title of host publication2012 IEEE 55th International Midwest Symposium on Circuits and Systems, MWSCAS 2012
Pages17-20
Number of pages4
DOIs
StatePublished - 2012
Event2012 IEEE 55th International Midwest Symposium on Circuits and Systems, MWSCAS 2012 - Boise, ID, United States
Duration: Aug 5 2012Aug 8 2012

Publication series

NameMidwest Symposium on Circuits and Systems
ISSN (Print)1548-3746

Conference

Conference2012 IEEE 55th International Midwest Symposium on Circuits and Systems, MWSCAS 2012
Country/TerritoryUnited States
CityBoise, ID
Period08/5/1208/8/12

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