TY - GEN
T1 - An ultra-low frequency ring oscillator with programmable tracking using a phase-locked loop
AU - Lee, Tsung Hsueh
AU - Abshire, Pamela A.
PY - 2012
Y1 - 2012
N2 - This paper presents a programmable ultra-low frequency ring oscillator designed in a 0.5μm CMOS technology with 3.3 V power supply. In normal operation, the oscillator produces a periodic signal without external inputs (other than power and ground). During programming, the oscillator tracks and memorizes the input reference frequency using a phase-locked loop (PLL) architecture. The PLL controls an on-chip nonvolatile memory using a floating gate structure; the voltage on the floating gate node is applied to the voltage-controlled oscillator (VCO) to generate the desired frequency. A high-voltage NMOS is introduced to realize the floating gate control; measurement results show that the breakdown voltage is close to 40 V. Transient simulations indicate that the circuit successfully tracks a desired frequency with maximum period jitter of 0.49 μs at the VCO output which translates to frequency error of 0.88 % at the system output.
AB - This paper presents a programmable ultra-low frequency ring oscillator designed in a 0.5μm CMOS technology with 3.3 V power supply. In normal operation, the oscillator produces a periodic signal without external inputs (other than power and ground). During programming, the oscillator tracks and memorizes the input reference frequency using a phase-locked loop (PLL) architecture. The PLL controls an on-chip nonvolatile memory using a floating gate structure; the voltage on the floating gate node is applied to the voltage-controlled oscillator (VCO) to generate the desired frequency. A high-voltage NMOS is introduced to realize the floating gate control; measurement results show that the breakdown voltage is close to 40 V. Transient simulations indicate that the circuit successfully tracks a desired frequency with maximum period jitter of 0.49 μs at the VCO output which translates to frequency error of 0.88 % at the system output.
UR - https://www.scopus.com/pages/publications/84867308605
U2 - 10.1109/MWSCAS.2012.6291946
DO - 10.1109/MWSCAS.2012.6291946
M3 - Conference contribution
AN - SCOPUS:84867308605
SN - 9781467325264
T3 - Midwest Symposium on Circuits and Systems
SP - 17
EP - 20
BT - 2012 IEEE 55th International Midwest Symposium on Circuits and Systems, MWSCAS 2012
T2 - 2012 IEEE 55th International Midwest Symposium on Circuits and Systems, MWSCAS 2012
Y2 - 5 August 2012 through 8 August 2012
ER -