Analog circuit topological feature extraction with unsupervised learning of new sub-structures

Hao Li; Fanshu Jiao; Alex Doboli

doi:10.3850/9783981537079_0923

Analog circuit topological feature extraction with unsupervised learning of new sub-structures

Hao Li
, Fanshu Jiao
, Alex Doboli

Electrical Engineering

Stony Brook University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

32 Scopus citations

Abstract

This paper presents novel techniques to automatically extract the topological (structural) features in analog circuits. The extracted features include basic building blocks, structural templates and hierarchical structures. Finding structural features is important for tasks like circuit synthesis and sizing, design verification, design reuse, and design knowledge description, summarization and management. The paper presents algorithms for supervised feature extraction and unsupervised learning of new block connections. Experiments discuss feature extraction for a set of 34 state-of-the-art analog circuits.

Original language	English
Title of host publication	Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1509-1512
Number of pages	4
ISBN (Electronic)	9783981537062
DOIs	https://doi.org/10.3850/9783981537079_0923
State	Published - Apr 25 2016
Event	19th Design, Automation and Test in Europe Conference and Exhibition, DATE 2016 - Dresden, Germany Duration: Mar 14 2016 → Mar 18 2016

Publication series

Name	Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016

Conference

Conference	19th Design, Automation and Test in Europe Conference and Exhibition, DATE 2016
Country/Territory	Germany
City	Dresden
Period	03/14/16 → 03/18/16

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10.3850/9783981537079_0923

Cite this

Li, H., Jiao, F., & Doboli, A. (2016). Analog circuit topological feature extraction with unsupervised learning of new sub-structures. In Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016 (pp. 1509-1512). Article 7459552 (Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.3850/9783981537079_0923

Li, Hao ; Jiao, Fanshu ; Doboli, Alex. / Analog circuit topological feature extraction with unsupervised learning of new sub-structures. Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016. Institute of Electrical and Electronics Engineers Inc., 2016. pp. 1509-1512 (Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016).

@inproceedings{bbd2fdb1310e4f70852e04969400676e,

title = "Analog circuit topological feature extraction with unsupervised learning of new sub-structures",

abstract = "This paper presents novel techniques to automatically extract the topological (structural) features in analog circuits. The extracted features include basic building blocks, structural templates and hierarchical structures. Finding structural features is important for tasks like circuit synthesis and sizing, design verification, design reuse, and design knowledge description, summarization and management. The paper presents algorithms for supervised feature extraction and unsupervised learning of new block connections. Experiments discuss feature extraction for a set of 34 state-of-the-art analog circuits.",

author = "Hao Li and Fanshu Jiao and Alex Doboli",

note = "Publisher Copyright: {\textcopyright} 2016 EDAA.; 19th Design, Automation and Test in Europe Conference and Exhibition, DATE 2016 ; Conference date: 14-03-2016 Through 18-03-2016",

year = "2016",

month = apr,

day = "25",

doi = "10.3850/9783981537079\_0923",

language = "English",

series = "Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "1509--1512",

booktitle = "Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016",

}

Li, H, Jiao, F & Doboli, A 2016, Analog circuit topological feature extraction with unsupervised learning of new sub-structures. in Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016., 7459552, Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016, Institute of Electrical and Electronics Engineers Inc., pp. 1509-1512, 19th Design, Automation and Test in Europe Conference and Exhibition, DATE 2016, Dresden, Germany, 03/14/16. https://doi.org/10.3850/9783981537079_0923

Analog circuit topological feature extraction with unsupervised learning of new sub-structures. / Li, Hao; Jiao, Fanshu; Doboli, Alex.
Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016. Institute of Electrical and Electronics Engineers Inc., 2016. p. 1509-1512 7459552 (Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Analog circuit topological feature extraction with unsupervised learning of new sub-structures

AU - Li, Hao

AU - Jiao, Fanshu

AU - Doboli, Alex

PY - 2016/4/25

Y1 - 2016/4/25

N2 - This paper presents novel techniques to automatically extract the topological (structural) features in analog circuits. The extracted features include basic building blocks, structural templates and hierarchical structures. Finding structural features is important for tasks like circuit synthesis and sizing, design verification, design reuse, and design knowledge description, summarization and management. The paper presents algorithms for supervised feature extraction and unsupervised learning of new block connections. Experiments discuss feature extraction for a set of 34 state-of-the-art analog circuits.

AB - This paper presents novel techniques to automatically extract the topological (structural) features in analog circuits. The extracted features include basic building blocks, structural templates and hierarchical structures. Finding structural features is important for tasks like circuit synthesis and sizing, design verification, design reuse, and design knowledge description, summarization and management. The paper presents algorithms for supervised feature extraction and unsupervised learning of new block connections. Experiments discuss feature extraction for a set of 34 state-of-the-art analog circuits.

UR - https://www.scopus.com/pages/publications/84973621790

U2 - 10.3850/9783981537079_0923

DO - 10.3850/9783981537079_0923

M3 - Conference contribution

AN - SCOPUS:84973621790

T3 - Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016

SP - 1509

EP - 1512

BT - Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 19th Design, Automation and Test in Europe Conference and Exhibition, DATE 2016

Y2 - 14 March 2016 through 18 March 2016

ER -

Li H, Jiao F, Doboli A. Analog circuit topological feature extraction with unsupervised learning of new sub-structures. In Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016. Institute of Electrical and Electronics Engineers Inc. 2016. p. 1509-1512. 7459552. (Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016). doi: 10.3850/9783981537079_0923

Analog circuit topological feature extraction with unsupervised learning of new sub-structures

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