Analysis of the Sub-μA Fully Integrated NMOS LDO for Backscattering System

Puyang Zheng; Xiao Sha; Milutin Stanacevic

doi:10.1109/SOCC52499.2021.9739384

Analysis of the Sub-_μA Fully Integrated NMOS LDO for Backscattering System

Puyang Zheng
, Xiao Sha
, Milutin Stanacevic

Electrical Engineering

Stony Brook University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Scopus citations

Abstract

A fully integrated NMOS low-dropout (LDO) voltage regulator with the ultra-low quiescent current tailored to RF backscattering systems is analyzed. A folded-cascode amplifier is used as the error amplifier implementation to obtain good performance in terms of the loop stability, line regulation, load regulation and power supply rejection ratio (PSRR). The NMOS LDO regulator is simulated in the 180 nm CMOS technology with a 6 nA quiescent current. The line and load regulations are respectively 0.003 mV/V and 8 mV/mA with only 1 pF load capacitor and maximum 10 μA load current. The PSRR is -67 dB at the low frequencies and -22 dB at 1 MHz.

Original language	English
Title of host publication	Proceedings - 34th IEEE International System-on-Chip Conference, SOCC 2021
Editors	Gang Qu, Jinjun Xiong, Danella Zhao, Venki Muthukumar, Md Farhadur Reza, Ramalingam Sridhar
Publisher	IEEE Computer Society
Pages	52-56
Number of pages	5
ISBN (Electronic)	9781665429313
DOIs	https://doi.org/10.1109/SOCC52499.2021.9739384
State	Published - 2021
Event	34th IEEE International System-on-Chip Conference, SOCC 2021 - Virtual, Online, United States Duration: Sep 14 2021 → Sep 17 2021

Publication series

Name	International System on Chip Conference
Volume	2021-September
ISSN (Print)	2164-1676
ISSN (Electronic)	2164-1706

Conference

Conference	34th IEEE International System-on-Chip Conference, SOCC 2021
Country/Territory	United States
City	Virtual, Online
Period	09/14/21 → 09/17/21

Keywords

backscattering system
folded-cascode
low quiescent current
NMOS LDO
small load current

Access to Document

10.1109/SOCC52499.2021.9739384

Cite this

Zheng, P., Sha, X., & Stanacevic, M. (2021). Analysis of the Sub-_μA Fully Integrated NMOS LDO for Backscattering System. In G. Qu, J. Xiong, D. Zhao, V. Muthukumar, M. F. Reza, & R. Sridhar (Eds.), Proceedings - 34th IEEE International System-on-Chip Conference, SOCC 2021 (pp. 52-56). (International System on Chip Conference; Vol. 2021-September). IEEE Computer Society. https://doi.org/10.1109/SOCC52499.2021.9739384

Zheng, Puyang ; Sha, Xiao ; Stanacevic, Milutin. / Analysis of the Sub-_μA Fully Integrated NMOS LDO for Backscattering System. Proceedings - 34th IEEE International System-on-Chip Conference, SOCC 2021. editor / Gang Qu ; Jinjun Xiong ; Danella Zhao ; Venki Muthukumar ; Md Farhadur Reza ; Ramalingam Sridhar. IEEE Computer Society, 2021. pp. 52-56 (International System on Chip Conference).

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title = "Analysis of the Sub-μA Fully Integrated NMOS LDO for Backscattering System",

abstract = "A fully integrated NMOS low-dropout (LDO) voltage regulator with the ultra-low quiescent current tailored to RF backscattering systems is analyzed. A folded-cascode amplifier is used as the error amplifier implementation to obtain good performance in terms of the loop stability, line regulation, load regulation and power supply rejection ratio (PSRR). The NMOS LDO regulator is simulated in the 180 nm CMOS technology with a 6 nA quiescent current. The line and load regulations are respectively 0.003 mV/V and 8 mV/mA with only 1 pF load capacitor and maximum 10 μA load current. The PSRR is -67 dB at the low frequencies and -22 dB at 1 MHz.",

keywords = "backscattering system, folded-cascode, low quiescent current, NMOS LDO, small load current",

author = "Puyang Zheng and Xiao Sha and Milutin Stanacevic",

note = "Publisher Copyright: {\textcopyright} 2021 IEEE.; 34th IEEE International System-on-Chip Conference, SOCC 2021 ; Conference date: 14-09-2021 Through 17-09-2021",

year = "2021",

doi = "10.1109/SOCC52499.2021.9739384",

language = "English",

series = "International System on Chip Conference",

publisher = "IEEE Computer Society",

pages = "52--56",

editor = "Gang Qu and Jinjun Xiong and Danella Zhao and Venki Muthukumar and Reza, \{Md Farhadur\} and Ramalingam Sridhar",

booktitle = "Proceedings - 34th IEEE International System-on-Chip Conference, SOCC 2021",

}

Zheng, P, Sha, X & Stanacevic, M 2021, Analysis of the Sub-_μA Fully Integrated NMOS LDO for Backscattering System. in G Qu, J Xiong, D Zhao, V Muthukumar, MF Reza & R Sridhar (eds), Proceedings - 34th IEEE International System-on-Chip Conference, SOCC 2021. International System on Chip Conference, vol. 2021-September, IEEE Computer Society, pp. 52-56, 34th IEEE International System-on-Chip Conference, SOCC 2021, Virtual, Online, United States, 09/14/21. https://doi.org/10.1109/SOCC52499.2021.9739384

Analysis of the Sub-_μA Fully Integrated NMOS LDO for Backscattering System. / Zheng, Puyang; Sha, Xiao; Stanacevic, Milutin.
Proceedings - 34th IEEE International System-on-Chip Conference, SOCC 2021. ed. / Gang Qu; Jinjun Xiong; Danella Zhao; Venki Muthukumar; Md Farhadur Reza; Ramalingam Sridhar. IEEE Computer Society, 2021. p. 52-56 (International System on Chip Conference; Vol. 2021-September).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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N2 - A fully integrated NMOS low-dropout (LDO) voltage regulator with the ultra-low quiescent current tailored to RF backscattering systems is analyzed. A folded-cascode amplifier is used as the error amplifier implementation to obtain good performance in terms of the loop stability, line regulation, load regulation and power supply rejection ratio (PSRR). The NMOS LDO regulator is simulated in the 180 nm CMOS technology with a 6 nA quiescent current. The line and load regulations are respectively 0.003 mV/V and 8 mV/mA with only 1 pF load capacitor and maximum 10 μA load current. The PSRR is -67 dB at the low frequencies and -22 dB at 1 MHz.

AB - A fully integrated NMOS low-dropout (LDO) voltage regulator with the ultra-low quiescent current tailored to RF backscattering systems is analyzed. A folded-cascode amplifier is used as the error amplifier implementation to obtain good performance in terms of the loop stability, line regulation, load regulation and power supply rejection ratio (PSRR). The NMOS LDO regulator is simulated in the 180 nm CMOS technology with a 6 nA quiescent current. The line and load regulations are respectively 0.003 mV/V and 8 mV/mA with only 1 pF load capacitor and maximum 10 μA load current. The PSRR is -67 dB at the low frequencies and -22 dB at 1 MHz.

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