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Bufferless routing in optical Gaussian macrochip interconnect

  • Stony Brook University

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Scopus citations

Abstract

In optical multichip system, called Gaussian macro chip, where embedded chips are interconnected by an optical Gaussian network. By taking advantage of the underlying Hamiltonian cycles in the Gaussian network, we design a buffer less routing algorithm for the Gaussian macro chip, which routes packets along the shortest path in the absence of deflection, and guarantees that deflected packets reach their destinations along a segment of the Hamilton cycle. Our extensive simulation results demonstrate that by adopting the proposed routing algorithm, Gaussian macro chip can support much higher inter-chip communication bandwidth, has much shorter average packet delay, and is more power efficient than the previously proposed architectures for optical multichip systems.

Original languageEnglish
Title of host publicationProceedings - 2012 IEEE 20th Annual Symposium on High-Performance Interconnects, HOTI 2012
Pages56-63
Number of pages8
DOIs
StatePublished - 2012
Event2012 IEEE 20th Annual Symposium on High-Performance Interconnects, HOTI 2012 - Santa Clara, CA, United States
Duration: Aug 22 2012Aug 24 2012

Publication series

NameProceedings - 2012 IEEE 20th Annual Symposium on High-Performance Interconnects, HOTI 2012

Conference

Conference2012 IEEE 20th Annual Symposium on High-Performance Interconnects, HOTI 2012
Country/TerritoryUnited States
CitySanta Clara, CA
Period08/22/1208/24/12

Keywords

  • Bufferless routing
  • Gaussian network
  • Macrochip
  • Network-on-Chip
  • Optical interconnections
  • Optical packet switching

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