Abstract
A large-area flat-panel detector for digital radiology is being developed. The detector uses an array of dual-gate thin-film transistors (TFTs) to read out X-ray-generated charge produced in an amorphous selenium (a-Se) layer. The TFTs use CdSe as the semiconductor and use the bottom gate for row selection. The top gate can be divided into a "deliberate" gate, covering most of the channel length, and smaller "parasitic" gates that consist of (i) overlap of source or drain metal over the top-gate oxide, and (ii) gap regions in the metal that are covered only by the a-Se. In this paper we present the properties of dual-gate TFTs and examine the effect of both the deliberate and parasitic gates on the detector operation. Various options for controlling the top-gate potential are analyzed and discussed.
| Original language | English |
|---|---|
| Pages (from-to) | S131-S134 |
| Journal | Canadian Journal of Physics |
| Volume | 74 |
| DOIs | |
| State | Published - 1996 |
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