Abstract
We propose a volumetric ray tracing PCI board which uses FPGA components and on chip memory. In a multi-board system a super volume (i.e., one that is larger than on-board memory) can be either distributed or shared. In a single board system it must be fetched from main memory as needed. In any case the volume is sub-divided into cubic cells and process scheduling has a major impact on the rendering time. There is not generally a scheduling order which would allow each sub-volume to be read from memory only once. We introduce instead a new, compact representation of the cell ray-spawning dependencies of all rays, called Cell Tree. We use this Cell Tree to determine a good processing schedule for the next frame based on the ray dependencies from the previous frame. Experimental results show an average miss reduction of 30%. The main contribution of this paper is the generation of a Cell Tree for ray tracing which collects coherent bundles of rays with very little overhead. This is used to decrease overall memory access in sequences where there is good inter-frame coherence.
| Original language | English |
|---|---|
| Pages | 127-135 |
| Number of pages | 9 |
| State | Published - 2002 |
| Event | Graphics hardware 2002 - Saarbrucken, Germany Duration: Sep 1 2002 → Sep 2 2002 |
Conference
| Conference | Graphics hardware 2002 |
|---|---|
| Country/Territory | Germany |
| City | Saarbrucken |
| Period | 09/1/02 → 09/2/02 |
Keywords
- Inter-frame coherence
- Load balancing
- Super volume
- Volumetric ray tracing
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