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Efficient circuit design for low power energy harvesting

  • F. Harerimana
  • , H. Peng
  • , M. Otobo
  • , F. Luo
  • , M. N. Gikunda
  • , J. M. Mangum
  • , V. P. Labella
  • , P. M. Thibado
  • University of Arkansas, Fayetteville
  • SUNY Polytechnic Institute

Research output: Contribution to journalArticlepeer-review

12 Scopus citations

Abstract

We present five circuit topologies for low power energy harvesting. The most efficient circuit uses a variable capacitor as the power source, a DC bias voltage to charge the variable capacitor, two transistors for rectification, and two storage capacitors. Varying the capacitance performs work and results in stored charge in the capacitors. We experimentally measure the storage capacitor voltage and current over time. The circuit efficiency nears 50% at a maximum power of 10 nW. Multiple circuit topologies are simulated and yield efficiencies from 15% to 50%.

Original languageEnglish
Article number105006
JournalAIP Advances
Volume10
Issue number10
DOIs
StatePublished - Oct 1 2020

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