TY - GEN
T1 - FPGASwarm
T2 - 28th International Conference on Field-Programmable Logic and Applications, FPL 2018
AU - Cho, Shenghsun
AU - Ferdman, Michael
AU - Milder, Peter
N1 - Publisher Copyright:
© 2018 IEEE.
PY - 2018/11/9
Y1 - 2018/11/9
N2 - Explicit state model checking has been widely used to discover difficult-to-find errors in critical software and hardware systems by exploring all possible combinations of control paths to determine if any input sequence can cause the system to enter an illegal state. Unfortunately, the vast state spaces of modern systems limit the ability of current general-purpose CPUs to perform explicit state model checking effectively due to the computational complexity of the model checking process. Complex software may require days or weeks to go through the formal verification phase, making it impractical to use model checking as part of the regular software development process. In this work, we explore the possibility of leveraging FPGAs to overcome the performance challenges of model checking. We designed FPGASwarm, an FPGA model checker based on the concept of Swarm verification. FPGASwarm provides the necessary parallelism, performance, and flexibility to achieve high-throughput and reconfigurable explicit state model checking. Our experimental results show that, using a Xilinx Virtex-7 FPGA, the FPGASwarm can achieve near three orders of magnitude speedup over the conventional software approach to state exploration.
AB - Explicit state model checking has been widely used to discover difficult-to-find errors in critical software and hardware systems by exploring all possible combinations of control paths to determine if any input sequence can cause the system to enter an illegal state. Unfortunately, the vast state spaces of modern systems limit the ability of current general-purpose CPUs to perform explicit state model checking effectively due to the computational complexity of the model checking process. Complex software may require days or weeks to go through the formal verification phase, making it impractical to use model checking as part of the regular software development process. In this work, we explore the possibility of leveraging FPGAs to overcome the performance challenges of model checking. We designed FPGASwarm, an FPGA model checker based on the concept of Swarm verification. FPGASwarm provides the necessary parallelism, performance, and flexibility to achieve high-throughput and reconfigurable explicit state model checking. Our experimental results show that, using a Xilinx Virtex-7 FPGA, the FPGASwarm can achieve near three orders of magnitude speedup over the conventional software approach to state exploration.
KW - accelerator
KW - formal verification
KW - model checking
UR - https://www.scopus.com/pages/publications/85060275948
U2 - 10.1109/FPL.2018.00080
DO - 10.1109/FPL.2018.00080
M3 - Conference contribution
AN - SCOPUS:85060275948
T3 - Proceedings - 2018 International Conference on Field-Programmable Logic and Applications, FPL 2018
SP - 435
EP - 442
BT - Proceedings - 2018 International Conference on Field-Programmable Logic and Applications, FPL 2018
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 26 August 2018 through 30 August 2018
ER -