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Investigation of Static Performances of 1.2kV 4H-SiC MOSFETs Fabricated Using All 'Room Temperature' Ion Implantations

  • Stephen A. Mancini
  • , Seung Yup Jang
  • , Zeyu Chen
  • , Dongyoung Kim
  • , Alex Bialy
  • , Balaji Raghotamacher
  • , Michael Dudley
  • , Nadeemullah Mahadik
  • , Robert Stahlbush
  • , Mowafak Al-Jassim
  • , Woongje Sung
  • SUNY Albany
  • Stony Brook University
  • Naval Research Laboratory
  • National Renewable Energy Laboratory

Research output: Contribution to journalArticlepeer-review

6 Scopus citations

Abstract

Several different designs of 1.2kV-rated 4H-SiC MOSFETs have been successfully fabricated under various ion implantation conditions. Implantation conditions consisted of different P+ profiles and implantation temperatures of both room temperature (25°C) and elevated temperatures (600°C) in order to monitor subsequent lattice damage. Through the use of X-Ray topography, SEM imaging, and electrical measurements, it was shown that room temperature implanted devices can mimic the static performances of high temperature implanted MOSFETs and reduce lattice damage suffered during the fabrication process, when the dose of high energy implants are suppressed.

Original languageEnglish
Pages (from-to)150-158
Number of pages9
JournalIEEE Journal of the Electron Devices Society
Volume12
DOIs
StatePublished - 2024

Keywords

  • 3rd quadrant
  • 4H-Silicon Carbide (SiC)
  • MOSFET
  • SEM-analysis
  • X-Ray topography
  • breakdown voltage
  • design approach
  • leakage current
  • room temperature implantation

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