Large-area low-noise Single-Photon Avalanche Diodes in standard CMOS

Babak Nouri; Marc Dandin; Pamela Abshire

doi:10.1109/ICSENS.2012.6411365

Large-area low-noise Single-Photon Avalanche Diodes in standard CMOS

Babak Nouri
, Marc Dandin
, Pamela Abshire

Electrical Engineering

University of Maryland, College Park

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

11 Scopus citations

Abstract

We report a Single Photon Avalanche Diode (SPAD) in standard CMOS with a physical implementation that offers high fill factor and very low Dark Count Rate (DCR). The demonstrated suppression of the Dark Count is achieved through alterations made to the structure of the SPAD without any modifications in the fabrication process. The structure of the device consists of a perimeter gated junction with a geometrical profile that is tailored for high gettering efficiency. We previously demonstrated DCR of 20 KHz for a 50 μm diameter perimeter gated circular SPAD (2 orders of magnitude DCR reduction). Using our current design we report DCRs of 10 Hz for a 1200 μm² SPAD operated at an excess bias of up to 1V. The reported DCRs are obtained for SPADs fabricated in single-well standard CMOS and operated at room temperature.

Original language	English
Title of host publication	IEEE SENSORS 2012 - Proceedings
DOIs	https://doi.org/10.1109/ICSENS.2012.6411365
State	Published - 2012
Event	11th IEEE SENSORS 2012 Conference - Taipei, Taiwan, Province of China Duration: Oct 28 2012 → Oct 31 2012

Publication series

Name	Proceedings of IEEE Sensors

Conference

Conference	11th IEEE SENSORS 2012 Conference
Country/Territory	Taiwan, Province of China
City	Taipei
Period	10/28/12 → 10/31/12

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10.1109/ICSENS.2012.6411365

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title = "Large-area low-noise Single-Photon Avalanche Diodes in standard CMOS",

abstract = "We report a Single Photon Avalanche Diode (SPAD) in standard CMOS with a physical implementation that offers high fill factor and very low Dark Count Rate (DCR). The demonstrated suppression of the Dark Count is achieved through alterations made to the structure of the SPAD without any modifications in the fabrication process. The structure of the device consists of a perimeter gated junction with a geometrical profile that is tailored for high gettering efficiency. We previously demonstrated DCR of 20 KHz for a 50 μm diameter perimeter gated circular SPAD (2 orders of magnitude DCR reduction). Using our current design we report DCRs of 10 Hz for a 1200 μm2 SPAD operated at an excess bias of up to 1V. The reported DCRs are obtained for SPADs fabricated in single-well standard CMOS and operated at room temperature.",

author = "Babak Nouri and Marc Dandin and Pamela Abshire",

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doi = "10.1109/ICSENS.2012.6411365",

language = "English",

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AU - Dandin, Marc

AU - Abshire, Pamela

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N2 - We report a Single Photon Avalanche Diode (SPAD) in standard CMOS with a physical implementation that offers high fill factor and very low Dark Count Rate (DCR). The demonstrated suppression of the Dark Count is achieved through alterations made to the structure of the SPAD without any modifications in the fabrication process. The structure of the device consists of a perimeter gated junction with a geometrical profile that is tailored for high gettering efficiency. We previously demonstrated DCR of 20 KHz for a 50 μm diameter perimeter gated circular SPAD (2 orders of magnitude DCR reduction). Using our current design we report DCRs of 10 Hz for a 1200 μm2 SPAD operated at an excess bias of up to 1V. The reported DCRs are obtained for SPADs fabricated in single-well standard CMOS and operated at room temperature.

AB - We report a Single Photon Avalanche Diode (SPAD) in standard CMOS with a physical implementation that offers high fill factor and very low Dark Count Rate (DCR). The demonstrated suppression of the Dark Count is achieved through alterations made to the structure of the SPAD without any modifications in the fabrication process. The structure of the device consists of a perimeter gated junction with a geometrical profile that is tailored for high gettering efficiency. We previously demonstrated DCR of 20 KHz for a 50 μm diameter perimeter gated circular SPAD (2 orders of magnitude DCR reduction). Using our current design we report DCRs of 10 Hz for a 1200 μm2 SPAD operated at an excess bias of up to 1V. The reported DCRs are obtained for SPADs fabricated in single-well standard CMOS and operated at room temperature.

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DO - 10.1109/ICSENS.2012.6411365

M3 - Conference contribution

AN - SCOPUS:84873964639

SN - 9781457717659

T3 - Proceedings of IEEE Sensors

BT - IEEE SENSORS 2012 - Proceedings

T2 - 11th IEEE SENSORS 2012 Conference

Y2 - 28 October 2012 through 31 October 2012

ER -

Large-area low-noise Single-Photon Avalanche Diodes in standard CMOS

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