Low-complexity VLSI design and implementation of FFT based multi-carrier direct sequence spread spectrum transceiver

A design and implementation of an all-digital VLSI multi-carrier direct-sequence spread-spectrum IF/baseband transceiver architecture is presented. The paper describes a low-complexity VLSI architecture incorporating fast Fourier transform for multi-carrier modulation and demodulation. The architecture supports variable data rate and variable quality of service (QoS) transmission where both rate and reliability are controlled by the length of pseudo-random noise spreading sequence. Nyquist windowing is utilized to reduce the sensitivity to spurious sine wave and to frequency deviations in the receiver. A two-dimensional simple sliding correlation technique is incorporated for efficient data frame and spreading sequence synchronization. The architecture is capable of handling various date rates up to 1.024 Mbps through 64 equally spaced carrier frequencies covering 65.536 MHz bandwidth. The entire transceiver is implemented with 0.6-μm CMOS technology standard cells.