Low-power low-noise neural amplifier in 0.18μm FD-SOI technology

Donghwi Kim; Ridha Kamoua; Milutin Stanaćević

Low-power low-noise neural amplifier in 0.18μm FD-SOI technology

Electrical Engineering

Stony Brook University

Research output: Contribution to journal › Conference article › peer-review

8 Scopus citations

Abstract

For recording of neural signals from large population of neurons, stringent constraints are imposed on the design of neural amplifiers. We have designed neural amplifier in FD-SOI technology in order to achieve lower power consumption, smaller area, and better noise efficiency factor compared to the standard bulk processes. A symmetric pseudo resistor was realized with resistances on the order of 10¹⁵Ω, enabling a low cut-off frequency of 0.6mHz. The designed neural amplifier occupies an area of 0.004mm², with simulated performance demonstrating an input-referred noise of 3.07μV_rms and a power consumption of 6μW.

Original language	English
Article number	4252757
Pages (from-to)	805-808
Number of pages	4
Journal	Proceedings - IEEE International Symposium on Circuits and Systems
State	Published - 2007
Event	2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007 - New Orleans, LA, United States Duration: May 27 2007 → May 30 2007

Cite this

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title = "Low-power low-noise neural amplifier in 0.18μm FD-SOI technology",

abstract = "For recording of neural signals from large population of neurons, stringent constraints are imposed on the design of neural amplifiers. We have designed neural amplifier in FD-SOI technology in order to achieve lower power consumption, smaller area, and better noise efficiency factor compared to the standard bulk processes. A symmetric pseudo resistor was realized with resistances on the order of 1015Ω, enabling a low cut-off frequency of 0.6mHz. The designed neural amplifier occupies an area of 0.004mm2, with simulated performance demonstrating an input-referred noise of 3.07μVrms and a power consumption of 6μW.",

author = "Donghwi Kim and Ridha Kamoua and Milutin Stana{\'c}evi{\'c}",

year = "2007",

language = "English",

pages = "805--808",

journal = "Proceedings - IEEE International Symposium on Circuits and Systems",

issn = "0271-4310",

note = "2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007 ; Conference date: 27-05-2007 Through 30-05-2007",

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TY - JOUR

T1 - Low-power low-noise neural amplifier in 0.18μm FD-SOI technology

AU - Kim, Donghwi

AU - Kamoua, Ridha

AU - Stanaćević, Milutin

PY - 2007

Y1 - 2007

N2 - For recording of neural signals from large population of neurons, stringent constraints are imposed on the design of neural amplifiers. We have designed neural amplifier in FD-SOI technology in order to achieve lower power consumption, smaller area, and better noise efficiency factor compared to the standard bulk processes. A symmetric pseudo resistor was realized with resistances on the order of 1015Ω, enabling a low cut-off frequency of 0.6mHz. The designed neural amplifier occupies an area of 0.004mm2, with simulated performance demonstrating an input-referred noise of 3.07μVrms and a power consumption of 6μW.

AB - For recording of neural signals from large population of neurons, stringent constraints are imposed on the design of neural amplifiers. We have designed neural amplifier in FD-SOI technology in order to achieve lower power consumption, smaller area, and better noise efficiency factor compared to the standard bulk processes. A symmetric pseudo resistor was realized with resistances on the order of 1015Ω, enabling a low cut-off frequency of 0.6mHz. The designed neural amplifier occupies an area of 0.004mm2, with simulated performance demonstrating an input-referred noise of 3.07μVrms and a power consumption of 6μW.

UR - https://www.scopus.com/pages/publications/34548850397

M3 - Conference article

AN - SCOPUS:34548850397

SN - 0271-4310

SP - 805

EP - 808

JO - Proceedings - IEEE International Symposium on Circuits and Systems

JF - Proceedings - IEEE International Symposium on Circuits and Systems

M1 - 4252757

T2 - 2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007

Y2 - 27 May 2007 through 30 May 2007

ER -

Low-power low-noise neural amplifier in 0.18μm FD-SOI technology

Abstract

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