Mixed-mode VLSI implementation of Fuzzy ART

We present an asynchronous mixed analog-digital VLSI architecture which implements the Fuzzy Adaptive Resonance Theory (Fuzzy ART) algorithm. Both classification and learning are performed on-chip in real-time. Unique features of our implementation include: an embedded refresh mechanism to overcome memory drift due to charge leakage from volatile capacitive storage; and a recoding mechanism to eliminate and reassign inactive categories. A small scale 1.2 μm feature size CMOS prototype with 4 inputs and 8 output categories has been designed and fabricated. The unit cell which performs the fuzzy min and learning operations measures 100 μm by 45 μm. Experimental results are included to illustrate performance of the unit cell.