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Mosaic Pages: Big TLB Reach with Small Pages

  • Jaehyun Han
  • , Krishnan Gosakan
  • , William Kuszmaul
  • , Ibrahim N. Mubarek
  • , Nirjhar Mukherjee
  • , Karthik Sriram
  • , Guido Tagliavini
  • , Evan West
  • , Michael A. Bender
  • , Abhishek Bhattacharjee
  • , Alex Conway
  • , Martin Farach-Colton
  • , Jayneel Gandhi
  • , Rob Johnson
  • , Sudarsun Kannan
  • , Donald E. Porter
  • University of North Carolina at Chapel Hill
  • Advanced Micro Devices
  • Harvard University
  • Carnegie Mellon University
  • Yale University
  • Snowflake Inc.
  • Stony Brook University
  • Cornell University
  • New York University
  • Meta
  • Dell
  • Rutgers - The State University of New Jersey, New Brunswick

Research output: Contribution to journalArticlepeer-review

2 Scopus citations

Abstract

This article introduces mosaic pages, which increase translation lookaside buffer (TLB) reach by compressing multiple, discrete translations into one TLB entry. Mosaic leverages virtual contiguity for locality, but does not use physical contiguity. Mosaic relies on recent advances in hashing theory to constrain memory mappings, in order to realize this physical address compression without reducing memory utilization or increasing swapping. Mosaic reduces TLB misses in several workloads by 6%-81%. Our results show that Mosaics constraints on memory mappings do not harm performance, we never see conflicts before memory is 98% full in our experiments at which point a traditional design would also likely swap. Timing and area analyses on a commercial 28-nm CMOS process indicate that the hashing required on the critical path can run at a maximum frequency of 4 GHz, indicating that a Mosaic TLB is unlikely to affect clock frequency.

Original languageEnglish
Pages (from-to)52-59
Number of pages8
JournalIEEE Micro
Volume44
Issue number4
DOIs
StatePublished - 2024

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