TY - GEN
T1 - On mapping cube graphs onto VLSI arrays
AU - Ramakrishnan, I. V.
AU - Varman, P. J.
N1 - Publisher Copyright:
© 1984, Springer-Verlag.
PY - 1984
Y1 - 1984
N2 - Formal models of linear, mesh and hexagonal arrays are presented. These arrays are well-suited for VLSI (very large scale integration). A model of a logical linear array, wherein adjacent processors may be separated by wires of arbitrary length, is also presented. Logical linear arrays are important computational structures suitable for implementation on a a wafer where fabrication errors may cause processors to be separated by arbitrarily long distances. Cube graphs which are data-flow descriptions of some matrix and related computations are introduced. A mathematical technique is developed to construct algorithms for these array models from cube graphs. The technique is illustrated by constructing some published algorithms as well as some new algorithms.
AB - Formal models of linear, mesh and hexagonal arrays are presented. These arrays are well-suited for VLSI (very large scale integration). A model of a logical linear array, wherein adjacent processors may be separated by wires of arbitrary length, is also presented. Logical linear arrays are important computational structures suitable for implementation on a a wafer where fabrication errors may cause processors to be separated by arbitrarily long distances. Cube graphs which are data-flow descriptions of some matrix and related computations are introduced. A mathematical technique is developed to construct algorithms for these array models from cube graphs. The technique is illustrated by constructing some published algorithms as well as some new algorithms.
UR - https://www.scopus.com/pages/publications/84935297999
U2 - 10.1007/3-540-13883-8_79
DO - 10.1007/3-540-13883-8_79
M3 - Conference contribution
AN - SCOPUS:84935297999
SN - 9783540138839
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 296
EP - 316
BT - Foundations of Software Technology and Theoretical Computer Science - 4th Conference, Proceedings
A2 - Joseph, Mathai
A2 - Shyamasundar, Rudrapatna
PB - Springer Verlag
T2 - 4th Conference on Foundations of Software Technology and Theoretical Computer Science, FST and TCS 1984
Y2 - 13 December 1984 through 15 December 1984
ER -