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On matrix multiplication using array processors

  • Rice University

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

Array processor models in the past have assumed constant storage per processor. Such an assumption leads to a lower bound of Ω(n2) time complexity to multiply two n×n matrices on a one-dimensional array processor. In this paper it is shown that relaxing the restriction of constant storage per processor leads to a lower bound of Ω(n√n) time complexity to multiply two n×n matrices on a one-dimensional array processor. Furthermore, an optimal matrix multiplication algorithm is described for such an array that uses O(n√n) processors and requires O(n√n) time. The algorithm is well suited for fault-tolerant VLSI implementation.

Original languageEnglish
Title of host publicationAutomata, Languages and Programming - 12th Colloquium
EditorsWilfried Brauer
PublisherSpringer Verlag
Pages487-496
Number of pages10
ISBN (Print)9783540156505
DOIs
StatePublished - 1985
Event12th International Colloquium on Automata, Languages and Programming, ALP 1985 - Nafplion, Greece
Duration: Jul 15 1985Jul 19 1985

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume194 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Conference

Conference12th International Colloquium on Automata, Languages and Programming, ALP 1985
Country/TerritoryGreece
CityNafplion
Period07/15/8507/19/85

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