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Pessimism reduction in static timing analysis using interdependent setup and hold times

  • Emre Salman
  • , Ali Dasdan
  • , Feroze Taraporevala
  • , Kayhan Kucukcakar
  • , Eby G. Friedman
  • Synopsys Inc.
  • University of Rochester

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

24 Scopus citations

Abstract

A methodology is proposed for interdependent setup time and hold time characterization of sequential circuits. Integrating the methodology into an industrial sign-off static timing analysis tool is described. The proposed methodology prevents optimism and reduces unnecessary pessimism, both of which exist due to independent characterization. Furthermore, the tradeoff between interdependent setup and hold times is exploited to significantly reduce slack violations. These benefits are validated using industrial circuits and tools.

Original languageEnglish
Title of host publicationProceedings - 7th International Symposium on Quality Electronic Design, ISQED 2006
Pages159-164
Number of pages6
DOIs
StatePublished - 2006
Event7th International Symposium on Quality Electronic Design, ISQED 2006 - San Jose, CA, United States
Duration: Mar 27 2006Mar 29 2006

Publication series

NameProceedings - International Symposium on Quality Electronic Design, ISQED
ISSN (Print)1948-3287
ISSN (Electronic)1948-3295

Conference

Conference7th International Symposium on Quality Electronic Design, ISQED 2006
Country/TerritoryUnited States
CitySan Jose, CA
Period03/27/0603/29/06

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