Processor Equivalence for Daisy Chain Load Sharing Processors

Thomas G. Robertazzi

doi:10.1109/7.259524

Processor Equivalence for Daisy Chain Load Sharing Processors

Thomas G. Robertazzi

Electrical Engineering

Research output: Contribution to journal › Article › peer-review

61 Scopus citations

Abstract

A linear daisy chain of processors where processor load is divisible and shared among the processors is examined. It is shown that two or more processors can be collapsed into a single equivalent processor. This equivalence allows a characterization of the nature of the minimal time solution, a simple method to determine when to distribute load for linear daisy chain networks of processors without front end communication subprocessors and closed form expressions for the equivalent processing speed of infinitely large daisy chains of processors.

Original language	English
Pages (from-to)	1216-1221
Number of pages	6
Journal	IEEE Transactions on Aerospace and Electronic Systems
Volume	29
Issue number	4
DOIs	https://doi.org/10.1109/7.259524
State	Published - Oct 1993

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title = "Processor Equivalence for Daisy Chain Load Sharing Processors",

abstract = "A linear daisy chain of processors where processor load is divisible and shared among the processors is examined. It is shown that two or more processors can be collapsed into a single equivalent processor. This equivalence allows a characterization of the nature of the minimal time solution, a simple method to determine when to distribute load for linear daisy chain networks of processors without front end communication subprocessors and closed form expressions for the equivalent processing speed of infinitely large daisy chains of processors.",

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AB - A linear daisy chain of processors where processor load is divisible and shared among the processors is examined. It is shown that two or more processors can be collapsed into a single equivalent processor. This equivalence allows a characterization of the nature of the minimal time solution, a simple method to determine when to distribute load for linear daisy chain networks of processors without front end communication subprocessors and closed form expressions for the equivalent processing speed of infinitely large daisy chains of processors.

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JO - IEEE Transactions on Aerospace and Electronic Systems

JF - IEEE Transactions on Aerospace and Electronic Systems

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Processor Equivalence for Daisy Chain Load Sharing Processors

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