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Rapidly reconfigurable coarse-grained FPGA architecture for digital filtering applications

  • Stony Brook University

Research output: Contribution to conferencePaperpeer-review

3 Scopus citations

Abstract

This paper presents a rapid reconfigurable coarsegrained FPGA architecture targeted for FIR filter, LMS adaptive FIR filters with multiple correlation and FFT/IFFT for digital filtering applications. The proposed architecture can configure up to four pipelined radix-4 or radix-2 2048 point FFT/IFFT, two 32-tap LMS filters or two 64-tap multiple FIR filters. By reducing unnecessary switching of general purpose routing resources, used extensively in fine-grained FPGAs, our approach can achieve the flexibility of a fine-grained FPGA with the performance and area efficiency similar to that of an ASIC.

Original languageEnglish
PagesIII203-III206
StatePublished - 2002
Event2002 45th Midwest Symposium on Circuits and Systems - Tulsa, OK, United States
Duration: Aug 4 2002Aug 7 2002

Conference

Conference2002 45th Midwest Symposium on Circuits and Systems
Country/TerritoryUnited States
CityTulsa, OK
Period08/4/0208/7/02

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