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Shielding methodologies in the presence of power/ground noise

  • University of Rochester

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

Design guidelines for shielding in the presence of power/ground (P/G) noise are presented in this paper. The effect of noise in the P/G network is analyzed for various line lengths, line widths, and interconnect driver resistances. A 2π RLC model is used to investigate the effect of both coupling capacitance and mutual inductance on the crosstalk noise. For a range of shield lengths and widths, a shield line can degrade signal integrity by increasing the crosstalk noise on the victim line. Different physical spacing and shield insertion methods are compared for various parameters in terms of the coupling noise on the victim line for a 65 nm technology node.

Original languageEnglish
Title of host publication2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
Pages2277-2280
Number of pages4
DOIs
StatePublished - 2009
Event2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009 - Taipei, Taiwan, Province of China
Duration: May 24 2009May 27 2009

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Conference

Conference2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
Country/TerritoryTaiwan, Province of China
CityTaipei
Period05/24/0905/27/09

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