Skip to main navigation Skip to search Skip to main content

Stacked DBC Cavitied Substrate for a 15-kV Half-bridge Power Module

  • Amol Deshpande
  • , Fang Luo
  • , Ange Iradukunda
  • , David Huitink
  • , Lauren Boteler
  • University of Arkansas, Fayetteville
  • U.S. Army Research Laboratory

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

36 Scopus citations

Abstract

High-voltage (3.3-10 kV) SiC power switching devices are on the verge of commercialization, while devices rated 15 kV and above are expected in the future. Consequently, there is an increasing demand for power modules that reliably packages them in common topologies for high-performance, while using standard manufacturing processes. This paper presents a solution to utilize direct-bonded-copper (DBC), which is a conventional low-voltage power module substrate, for highvoltage (15 kV) half-bridge power module packaging. The concept involves stacking multiple DBCs with the top-surface metallization pattern replicated on each inter-layer and the bottom-surface metallization. The consequent formation of the interlayer cavities within the stacked substrate creates a series-connected multi-layer capacitor under the DC+, DC-, and AC top-surface metallization. The multi-layer capacitors, where the DBC ceramic acts as the dielectric, equally distribute the high-voltage on the top-surface metallization across each ceramic under it. The voltage distribution enables minimization of the electric fields at the critical triple-point and within the bulk of ceramic. The proposed stacking allows bypassing the need for a voltage-clamped interlayer metallization. A multi-domain (electrical, thermal, mechanical) parametric analysis was performed to determine the number of ceramic layers and total ceramic thickness in the stack. The performed analysis qualitatively demonstrated the effectiveness of the proposed solution with an underlying trade-off.

Original languageEnglish
Title of host publication2019 IEEE International Workshop on Integrated Power Packaging, IWIPP 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages12-17
Number of pages6
ISBN (Electronic)9781538676097
DOIs
StatePublished - Apr 2019
Event3rd IEEE International Workshop on Integrated Power Packaging, IWIPP 2019 - Toulouse, France
Duration: Apr 24 2019Apr 26 2019

Publication series

Name2019 IEEE International Workshop on Integrated Power Packaging, IWIPP 2019

Conference

Conference3rd IEEE International Workshop on Integrated Power Packaging, IWIPP 2019
Country/TerritoryFrance
CityToulouse
Period04/24/1904/26/19

Fingerprint

Dive into the research topics of 'Stacked DBC Cavitied Substrate for a 15-kV Half-bridge Power Module'. Together they form a unique fingerprint.

Cite this