Study of minority carrier lifetime killer by synchrotron X-ray topography

The lifetime maps for a 2" n-type 4H-SiC quarter wafer (sample 1) and a 4" diameter half wafer (sample 2) were recorded using microwave photoconductive decay (μPCD) measurements and correlated with the synchrotron X-ray topography (SXRT) map of structural defects. The lifetime map of sample 1 revealed a drastic reduction in carrier lifetime along the edges and inside one of its facets (facet 1), correlated with microcracks, BPD loops, overlapping triangular defects, high density of multi-layer Shockley stacking faults (SFs) and low angle grain boundaries (LAGBs). Similarly, sample 2 showed a reduced carrier lifetime along the edges corresponding to regions of high density of overlapping triangular defects, microcracks and BPD loops in the SXRT map. Shorter lifetime observed in the middle region of sample 2 correlated with networks of interfacial dislocations (IDs) and half loop arrays (HLAs) originating from 3C inclusions that were generated during epilayers growth. Further analysis of the SXRT maps revealed the SFs in facet 1 were double Shockley stacking faults (DSSFs) that have likely nucleated from scratches present on the substrate surface and LAGBs present in that region, which propagated during epilayer growth. We discuss the mitigated influence of numerous morphological defects observed on the surface of both epilayer samples.