Symbolic matching and constraint generation for systematic comparison of analog circuits

This paper proposes an automated technique for systematically generating comparison data between two analog circuits. The comparison data presents the similar and distinguishing performance characteristics of the circuits with respect to DC-gain, bandwidth, common-mode rejection ratio, noise, and sensitivity. The comparison data is important for getting insight into the common and unique benefits of a circuit, selecting fitting circuit topologies for system design, and refining and optimizing circuit topologies. The technique utilizes matching of the topologies and symbolic expressions of the compared circuits to find the nodes with similar electric behavior. The impact on performance of the unmatched nodes is used to express the differentiating characteristics of the circuits. Experiments illustrate the technique for a pair of analog circuit designs.