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VLSI design of high-throughput processing element for real-time particle filtering

  • Stony Brook University

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

This paper presents a VLSI ASIC design of a high-throughput processing element for real-time particle filtering applications. The implementation is based on robust and efficient fixed-point processing algorithms. The high-throughput is achieved through two-level pipelining and preserving the inherent parallelism. The pipeline depth is balanced among sub-units to reduce clock loading via reduction of unnecessary registers. The processing element can be used as a standalone particle filter or a part of parallel particle filters for high-speed and/or larger particles.

Original languageEnglish
Title of host publicationSCS 2003 - International Symposium on Signals, Circuits and Systems, Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages617-620
Number of pages4
ISBN (Electronic)0780379799, 9780780379794
DOIs
StatePublished - 2003
EventInternational Symposium on Signals, Circuits and Systems, SCS 2003 - Iasi, Romania
Duration: Jul 10 2003Jul 11 2003

Publication series

NameSCS 2003 - International Symposium on Signals, Circuits and Systems, Proceedings
Volume2

Conference

ConferenceInternational Symposium on Signals, Circuits and Systems, SCS 2003
Country/TerritoryRomania
CityIasi
Period07/10/0307/11/03

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