Volume production of high quality SiC substrates and epitaxial layers: Defect trends and device applications

We review the progress of silicon carbide (SiC) bulk growth by the sublimation method, highlighting recent advances at Dow Corning, which resulted in the commercial release of 100 mm n-type 4H-SiC wafers with median micropipe densities (MPD) in production wafers <0.1cm- ² and the demonstration of micropipe free material over a full 100 mm diameter. Investigations by Synchrotron White Beam X-ray Topography (SWBXRT) and molten KOH etch pit analysis of 100 mm wafers demonstrate threading screw dislocation densities <500cm- ². Additional results indicate the positive impact of maintaining thermo-mechanical stress levels in the growing crystal below the critical resolved shear stress on reducing basal plane dislocation densities to values as low as ∼300-400cm- ² in 100 mm crystals. We summarize the steps of systematic quality improvements on increasing wafer diameter, utilizing numerical simulations of the SiC growth system as a critical tool to guide this process. For the economical production of SiC epitaxy, a 10×100 mm wafer platform has been established in a warm-wall planetary chemical vapor deposition (CVD) reactor. The combined improvements in the epitaxy process, pre-epi wafer surface preparation and the underlying substrate quality itself have led to a reduction of the device killer defect density from 8 cm ^-2 to 1.5 cm ^-2 on a volume product like 100 mm 4° off-axis 6.5μm epi-wafers. Dow Corning production epi-wafers routinely show Schottky diode yields above 90% at a die size of 2 mm×2 mm. Additionally, 50-100μm thick epitaxy on 76 mm 4° off-axis wafers with morphological defect densities of 2-6 cm ^-2, a surface roughness (RMS) ≤1nm as measured by atomic force microscopy (AFM), and carrier lifetimes consistently in the range of 2-3μs has been demonstrated.