When processors hit the power wall (or "when the CPU hits the fan")

Power consumption and heat removal have become first order limiters to "Moore's Law" as regards the growth of processor performance. This limitation has bubbled up from mobile devices to the desktop and now even server processors are investing heavily in technology that manages and reduces power consumption. The result is a fundamental shift in how circuit designers and architects attempt to extract performance from each new design generation. No aspect of the processor design ecosystem goes untouched: silicon process technology, circuit design, computer architecture, packaging and cooling are all facing fundamental shifts in priorities and methods. This special topic session explores the power consumption problem on leading edge processors and the possible technology directions in architecture, circuits and cooling. The first part of solving a problem is to understand it better, so we begin by examining in detail where the power is consumed on a leading edge processor and how it varies through time and workload. The next talk involves a look at one of the frontiers of VLSI design: the many opportunities present in creating "environmentally aware" chips that measure and react to their environment to optimize power, performance and other tradeoffs. We then have the chance to hear two of the industries leading architects discuss the meaning of "low power architecture", and what are some of the brightest opportunities for power efficiency. We round out the session with a look by one of the leading innovators in cooling technology at how we can efficiently remove that byproduct of computation: waste heat.